The NAND gate has the truth table shown. The output is logic 0 when both the inputs are logic 1, otherwise the output is logic 1.
A NOT gate can be made from a NAND gate with the two inputs connected together.
When the two inputs are connected together the only possible options are A and B are both Logic 0 and so the output is Logic 1 or A and B are both Logic 1 and so the output is Logic 0.
To make a NOT gate from a NAND gate, simply connect the two inputs of the NAND gate together.
An AND gate is simply the inverse of a NAND gate and so following a NAND gate with a NOT gate (made from a NAND gate) gives the logic equivalent of an AND gate.
The first logic gate is the NAND gate. The second logic gate is a NOT gate which inverts the output of the NAND gate to give the output required for an AND gate.
An OR gate is slightly more complicated to make from NAND gates. Three NAND gates are needed, two of them acting as NOT gates.
Looking at the inputs of the NAND gate it is clear that the truth table would give the correct output for an OR gate if all the inputs were inverted.
To make an OR gate use two NAND gates as NOT gates to invert the inputs to the remaining NAND gate.
A NOR gate is simply the inverse of an OR gate and so following a NOR gate (made from NAND gates) with a NOT gate (made from a NAND gate) gives the logic equivalent of a NOR gate.
The first three logic gates make the OR gate. The final logic gate acts as an inverter and makes the OR gate into a NOR gate. The NOR gate is made from four NAND gates and is therefore not always worthwhile (there are four NAND gates on an IC) but sometimes the NOT gates cancel making it worthwhile.
A NOT gate followed by another NOT gate has no effect on the logic signal. Two NOT gates in series are equivalent to a direct connection.
If A=1 then the output from the first NOT gate is Logic 0 and the output from the second NOT gate is Logic 1 and vice versa. In both cases A=Q and the two logic gates have no effect on the logic level of the signal.
Two NOT gates in series do, however, have an effect on the signal - each gate introduces a very small time delay in the signal so multiple NOT gates can be used to give a delay to avoid synchronization problems.
Consider the simple circuit shown. It contains three different logic gates and requires three different ICs to make it.
All of the logic gates are replaced with their NAND gate equivalents. This requires 6 logic gates and therefore two ICs which is an improvement.
In two places a NOT gate follows a NOT gate and so these cancel and can be removed - shown in grey.
Therefore the entire circuit can be reduced to just two logic gates which can be built with one IC - much better.
© Paul Nicholls
January 2017
Electronics Resources by Paul Nicholls is licensed under a Creative Commons Attribution 4.0 International License.
